1. Field of the Invention
The present invention relates to a flat panel display (FPD), and more particularly, to a flat panel display having a planar field emission source formed of a low work function material.
2. Description of the Related Art
FIG. 1 shows a conventional flat cathode ray tube. As shown in the drawing, a faceplate 1 and a back plate 3 are sealed by a sealant 5. A phosphor layer 7 and a metal film 9 are formed on an inner surface of the faceplate 1. A rear electrode 11 is formed on an inner surface of the back plate 3, which faces the inner surface of the faceplate 1. In addition, a plurality of tungsten line cathodes 13 is used as an electron emission source. A grid plate 15 and a mesh electrode 17 are disposed between the faceplate 1 and the back plate 3.
The grid plate 15 has a plurality of apertures 15a that are formed corresponding to pixels for passing electrons. First and second grid electrodes 19 and 21 are respectively formed on each surface of the grid plate 15. Each of the first and second grid electrodes 19 and 21, for example, function as scan and data electrodes.
Electrons emitted from the tungsten line cathodes 13 pass through the aperture 15a of the grid plate 15 under the control of the first and second grid electrodes 19 and 21, and land on light emitting anode to excite the phosphor layer 7 by a strong electric field applied to the metal film 9.
However, said flat cathode ray tube cannot easily be adapted for a large-sized display since the line cathodes 13 are used as the electron emission source. For a large-sized display, the line cathodes 13 need to extend the length, keeping the space between each other. Accordingly, uniformity of electron-emission and the luminescence of the phosphor layers 7 will be deteriorate because the line cathodes 13 tend to vibrate and the emission source becomes sparely distributed. Furthermore, the heat generated in the line cathodes 13 deforms the grid plate 15, resulting in misalignment of the apertures 15a and the corresponding phosphor layers 7.
To solve the above-described problems, U.S. Pat. No. 4,719,388 discloses a flat electron control device having a grid-shaped accelerator electrode disposed between wire-like cathodes and an address plate having apertures.
Although the flat electron control device has an advantage of emitting electrons under more stable conditions, it is still difficult to realize a large-sized display as it comprises a wire-like cathode.
It is an objective of the present invention to provide a flat panel display that has an advantage in realizing a large-sized display by changing the structure of the electron emission source.
It is another objective of the present invention to provide a flat panel display that can operate under a low driving voltage with improved performance of emission, convergence and acceleration, by using a low work function material as the field emission source.
To achieve the above objects, the present invention provides a flat panel display including a back plate, cathode and gate electrodes disposed on the back plate and insulated from each other by an insulating layer, a planar field emission source formed on the cathode electrode, a grid plate provided with a plurality of apertures corresponding to a pixel area and spaced from the back plate, and a faceplate spaced from the grid plate and having a screen formed on one surface thereof facing the grid plate.
The field emission source is formed of a material or mixture of carbonaceous materials selected from the group consisting of carbon nanotube (CNT), fullerene (C60), diamond liked carbon (DLC), and graphite.
The flat panel display further includes a first grid electrode on a back surface of the grid plate facing the back plate, and a second grid electrode on a front surface of the grid plate facing the faceplate.
Preferably, the first and second grid electrodes have a structure of plural line patterns along the aperture array that is perpendicular to the cathode electrode pattern. Each line pattern of the second grid electrode comprises two sub-electrodes that are bisected by the line of the aperture array on the grid electrode.
Alternatively, the grid plate is formed of a mesh electrode.
The flat panel display further comprises a plurality of first spacers formed on a non-effective area of the back plate for maintaining the space between the back plate and the grid plate, and a plurality of second spacers formed on a non-effective area of the grid plate for maintaining the space between the grid plate and the faceplate, wherein an aspect ratio of the second spacers is higher than the first spacers.
The gate electrode is formed on the surface of the back plate, the insulating layer is disposed on the surface of the back plate covering the gate electrode, and the cathode electrode is formed on the insulating layer. Preferably, the gate electrode and the cathode electrode have a structure of plural line patterns and intersect each other at right angles. The planar field emission source is formed on an edge of the cathode electrode.
Alternatively, the cathode electrode is formed on the surface of the back plate and having the planar field emission source corresponding to the pixel area. The insulating layer is disposed on the surface of the back plate to cover the cathode electrode except the planar field emission source. The gate electrode is formed on the insulating layer except the planar field emission source. Preferably, the gate electrode and the cathode electrode have a structure of plural line patterns and intersect each other at right angles.